Discovered 12h ago

ATE / Post-Silicon Validation Engineers | Teradyne UltraFLEX

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LocationGreater Bengaluru Area

Work Modeonsite

Experience5+ yrs

Estimated compensation~₹14–24 LPA

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Required Skills & Technology Stack

C++C#usbpcieuartJava

About the Role

Are you passionate about Semiconductor Testing, ATE and Post-Silicon Validation ? We are looking for engineers with hands-on experience in ATE test program development and silicon testing. 🔹 Role: ATE / Post-Silicon Validation Lead/Manager 🔹 Experience: 5–15Years Work location: Chennai (OMR);Bangalore( Electronic city Phase 1) 🔧 Key Skills ✅ Hands-on expertise in any one of these ATE…

This role in context

C++ is one of the skills this role asks for. It appears in 2,612 active tech jobs in India (4.1% of those we track). This posting asks for 5+ years. 46% of C++ jobs that state experience ask for 5–8 years. Bengaluru accounts for 40% of C++ jobs. 12% of C++ jobs are remote; this one is onsite.

Based on active listings from the last 30 days. See the full C++ job data →