Discovered 17h ago

Design Verification Engineer – SoC / Digital Verification

Synectics APAC•Linkedin

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LocationBengaluru, Karnataka, India

Work Modeonsite

Experience6+ yrs

Compensation~₹14–24 LPA

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Required Skills & Technology Stack

C++c/c++pcieuvm

About the Role

Key Responsibilities Develop and execute verification strategies and comprehensive test plans for SoC/Digital designs. Create reusable and robust test cases using SystemVerilog and UVM. Perform protocol-level verification for PCIe and/or UCIe interfaces. Develop test scenarios to validate design functionality, corner cases, and protocol compliance. Define verification plans, coverage goals, and…

This role in context

C++ is one of the skills this role asks for. It appears in 2,277 active tech jobs in India (4.2% of those we track). This posting asks for 6+ years. 46% of C++ jobs that state experience ask for 5–8 years. Bengaluru accounts for 41% of C++ jobs. 12% of C++ jobs are remote; this one is onsite.

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