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Discovered 2mo ago

ASIC RTL Design Lead Engineer
Ayno Technologies•Hirist
LocationNoida
Work Modeonsite
Experience7+ yrs
CompensationNot disclosed
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Required Skills & Technology Stack
RTL DesignASICVerilogSystemVerilogCDCSynthesisTiming Closure
About the Role
Job Description :
The job is for an experienced ASIC design engineer with strong technical skills in Verilog/SystemVerilog RTL design, CDC, and Lint. The ideal candidate will have experience in micro-architecture, integration, and debugging, as well as exposure to synthesis, timing, and low-power design. The role requires team leadership and cross-functional collaboration skills.
Key…
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