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Discovered 2d ago
In61 NXP

Lead DFT Engineer

In61 NXP•Workday
LocationNoida
Work Modeonsite
Experience7+ yrs
CompensationNot disclosed

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Required Skills & Technology Stack

jtagsynopsyscadencesynthesisdft

About the Role

Digital Design Engineer with hand on experience in Scan insertion, ATPG, GLS. He/She will be responsible for understanding the DFT architecture of the design and providing the scan insertion collaterals to the implementation team, to enable scan insertion flows during synthesis. Should have proficiency in industry-standard DFT tools such as Mentor Tessent , Synopsys DFT Compiler, Cadence…

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