Discovered 14d ago

RTL Engineer

Cyient•Linkedin

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LocationGreater Hyderabad Area

Work Modeonsite

Experience5+ yrs

Compensation~₹14–24 LPA

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Required Skills & Technology Stack

uvm

About the Role

Job Description: Simulation Migration Engineer(SV/UVM) Experience: 5 Years Location: Hyderabad Key Requirements: Strong hands-on experience in SystemVerilog (SV) and UVM methodology Experience in simulation migration activities, specifically from VCS to Xcelium (Exilium) Good understanding of low power verification concepts Expertise in functional verification, including testbench development and…