Lead PCB Schematic Design Engineer (grade T3) at Cadence Bangalore

There is an opening for Lead PCB Schematic Design Engineer (grade T3) in the High Speed SERDES Physical Layer Electrical Validation team at Cadence Design Systems, Bangalore. The role is intended for candidates with direct experience in this domain in the range of at least 4 years. Why choose Cadence Design Systems? These roles offer the opportunity to work on the post silicon electrical…